January 10, 2016

Limit Cycle Example

Given the following digital controller:

Considering the digital controller described by the equation C2 using direct form I (DFI) and implemented with <11,4> (i.e., 11 bits for integer part and 4 bits for precision) is checked using DSVerifier for limit cycle oscilations, the model checker found that if the digital controller’s initial state were y(-1)=-0.0625 and y(-2)=-0.3125 and use a zeroes input sequence as input, the outputs of digital controller will be oscillate in 0.125 and -0.125.

The outputs generated by the digital controller are shown below.